Verification

Systemverilog Verification 6: Simulation Time Regions in Detail

Intermediate level course explaining Simulation Regions like Active, Reactive, NBA etc in Systemverilog

Lesson path

Modules and lessons

Each module keeps the academy sequence intact and opens available lessons directly on YouTube.

01Introduction1/1 lessons · 2m

02Abstract of a Systemverilog Code1/1 lessons · 5m

2.1Abstract of a Systemverilog CodeCourse : Systemverilog Verification 6 : L2.1 : Abstract of A Systemverilog Code5:54Watch

03Simulation Time Regions1/1 lessons · 9m

3.1Simulation Time RegionsCourse : Systemverilog Verification 6 : L3.1 : Introduction to Systemverilog Time Regions9:26Watch

04Prepended & Active Regions2/2 lessons · 9m

4.1Preponed RegionCourse : Systemverilog Verification 6 : L4.1: Preponed Region2:33Watch
4.2Active RegionCourse : Systemverilog Verification 6 : L4.2 : Active Region Set7:09Watch

05Observed Region1/1 lessons · 4m

5.1Observed RegionCourse : Systemverilog Verification 6 : L5.1 : Observed Region4:21Watch

06Re-Region1/1 lessons · 7m

6.1Re-RegionCourse : Systemverilog Verification 6 : L6.1 : Re-Region set7:38Watch

07Postponed Region1/1 lessons · 4m

7.1Postponed RegionCourse : Systemverilog Verification 6 : L7.1 : Postponed Region4:39Watch

08Class & Coverage Regions1/1 lessons · 9m

8.1Class & Coverage RegionsCourse : Systemverilog Verification 6 : L8.1 : Classes & Coverage Simulation Regions9:22Watch

09Sim Regions Examples3/3 lessons · 31m

9.1Example1Course : Systemverilog Verification 6 : L9.1 : Simulation Regions Example 110:34Watch
9.2Example2Course : Systemverilog Verification 6 : L9.2 : Simulation Regions Example 214:58Watch
9.3Example3Course : Systemverilog Verification 6 : L9.3 : Simulation Regions Example 35:28Watch

10Summary1/1 lessons · 1m